![]() The interrupt latency requirement is the maximum time within which an interrupt must be serviced. Interrupts that cannot be serviced within the time limits specified for bus interrupts qualify as off-level interrupts.Ī device's interrupt priority is selected based on two criteria: its maximum interrupt latency requirements and the device driver's interrupt execution time. ![]() The rest of the interrupt priorities are reserved for the base kernel. The interrupt priorities for bus interrupts range from INTCLASS0 to INTCLASS3. INTMAX is the most favored interrupt priority and INTBASE is the least favored interrupt priority. The interrupt priority defines which of a set of pending interrupts is serviced first. The interrupt level of a bus interrupt is one of the resources managed by the bus configuration methods. The interrupt level of a system interrupt is defined in the sys/intr.h file. Examples of system interrupts are the timer and serial link interrupts. The system bus interrupts are generated from the Micro Channel bus and system I/O. There are basically two types of interrupt levels: system and bus. ![]() The interrupt level defines the source of the interrupt. AIX Version 4.3 Kernel Extensions and Device Support Programming ConceptsĮach hardware interrupt has an interrupt level and an interrupt priority.
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